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1

Fault tolerant design and digital simulation for increased system reliability and design automation

Journal:

Computer-Aided Design

Year:

1977

Language:

english

File:

PDF, 916 KB

english, 1977

2

MNFP — a new technique for efficient digital fault simulation

S. Hong, S.A. Szygenda

Journal:

Computer-Aided Design

Year:

1978

Language:

english

File:

PDF, 984 KB

english, 1978

3

Boolean vector algebraic structures: properties and applications to digital logic simulation

Y.H. Jea, S.A. Szygenda

Journal:

Computer-Aided Design

Year:

1979

Language:

english

File:

PDF, 1.27 MB

english, 1979

4

Development of reduced time interval partitioned simulation algorithm

S Kang, SA Szygenda

Journal:

Computer-Aided Design

Year:

1989

Language:

english

File:

PDF, 670 KB

english, 1989

5

MixMOS: a mixed-level simulator for digital MOS circuits using a new algebraic approach

Jin-Hyeung Kong, Stephen A. Szygenda

Journal:

Computer-Aided Design

Year:

1990

Language:

english

File:

PDF, 1.35 MB

english, 1990

6

Modeling techniques for medical diagnosis I. Heuristics and learning programs in selected neonatal hepatic disease

W.M. Lively, Stephen A. Szygenda, Charles E. Mize

Journal:

Computers and Biomedical Research

Year:

1973

Language:

english

File:

PDF, 1.17 MB

english, 1973

7

[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Test vector generation and classification using FSM traversals

Marczynski, R., Thornton, M.A., Szygenda, S.A.

Year:

2004

Language:

english

File:

PDF, 250 KB

english, 2004

8

[IEEE 48th Midwest Symposium on Circuits and Systems, 2005. - Covington, KY, USA (2005.08.7-2005.08.10)] 48th Midwest Symposium on Circuits and Systems, 2005. - A survey and comparison of digital logic simulators

Gunes, M., Thornton, M.A., Kocan, F., Szygenda, S.A.

Year:

2005

Language:

english

File:

PDF, 344 KB

english, 2005

9

[ACM Press the first international conference - Tullahoma, Tennessee, United States (1988..-..)] Proceedings of the first international conference on Industrial and engineering applications of artificial intelligence and expert systems - IEA/AIE '88 - SMARTGEN: the implementation of an expert system for the generation of digital logic diagnostic tests

Karim, Asad, Szygenda, Stephen A.

Year:

1988

Language:

english

File:

PDF, 433 KB

english, 1988

10

Modeling techniques for medical diagnosis. II. Differential diagnosis of neonatal hepatitis and biliary atresia

Charles E. Mize, William M. Lively, Stephen A. Szygenda

Journal:

Computers and Biomedical Research

Year:

1976

Language:

english

File:

PDF, 380 KB

english, 1976

11

Design error simulation based on error modeling and sampling techniques

Youngmin Hur, Stephen A Szygenda

Journal:

Mathematics and Computers in Simulation

Year:

1998

Language:

english

File:

PDF, 116 KB

english, 1998

12

A Systems Engineering Approach for Identifying the Most Critical Links of a Highway System: A Framework Consisting of a Methodology and Mathematical Model

Ibarra, G., Stracener, J.T., Szygenda, S.A.

Journal:

IEEE Systems Journal

Year:

2008

Language:

english

File:

PDF, 805 KB

english, 2008

13

Use of Non-Linear Programming and Stochastic Modeling in the Medical Evaluation of Normal-Abnormal Liver Function

Saffer, Shelley I., Mize, Charles E., Bhat, U. Narayan, Szygenda, Stephen A.

Journal:

IEEE Transactions on Biomedical Engineering

Year:

1976

Language:

english

File:

PDF, 1.53 MB

english, 1976

14

Modeling and Digital Simulation for Design Verification and Diagnosis

Szygenda, S.A., Thompson, E.W.

Journal:

IEEE Transactions on Computers

Year:

1976

Language:

english

File:

PDF, 4.41 MB

english, 1976

15

Digital Logic Simulation in a Time-Based, Table-Driven Environment

Thompson, E.W., Szygenda, S.A.

Journal:

Year:

1975

Language:

english

File:

PDF, 3.80 MB

english, 1975

16

Digital Logic Simulation in a Time-Based, Table-Driven Environment

Szygenda, S.A., Thompson, E.W.

Journal:

Year:

1975

Language:

english

File:

PDF, 4.80 MB

english, 1975

17

Digital Systems Simulation

Journal:

Year:

1975

Language:

english

File:

PDF, 1.54 MB

english, 1975

18

Mappings and algorithms for gate modeling in a digital simulation environment

Jea, Y., Szygenda, S.

Journal:

IEEE Transactions on Circuits and Systems

Year:

1979

Language:

english

File:

PDF, 1.17 MB

english, 1979

19

Failure Analysis of Memory Organization for Utilization in a Self-Repair Memory System

Szygenda, Stephen A., Flynn, Michael J.

Journal:

IEEE Transactions on Reliability

Year:

1971

Language:

english

File:

PDF, 1.34 MB

english, 1971

20

Self-Diagnosis and Self-Repair in Memory: An Integrated System Approach

Szygenda, Stephen A., Flynn, Michael J.

Journal:

IEEE Transactions on Reliability

Year:

1973

Language:

english

File:

PDF, 1.83 MB

english, 1973

21

Synthesis and Analysis of a Cost Effective, Ultrareliable, High Speed, Semiconductor Memory System

Husband, E.W., Szygenda, S.A.

Journal:

IEEE Transactions on Reliability

Year:

1976

Language:

english

File:

PDF, 1.18 MB

english, 1976

22

[IEEE 2007 1st Annual IEEE Systems Conference - Honolulu, HI, USA (2007.04.9-2007.04.13)] 2007 1st Annual IEEE Systems Conference - Disaster Tolerant Systems Engineering for Critical Infrastructure Protection

Harper, Michael A., Thornton, Mitchell A., Szygenda, Stephen A.

Year:

2007

Language:

english

File:

PDF, 2.42 MB

english, 2007

23

[ACM Press the 5th conference - New York, NY (1971.12.08-1971.12.10)] Proceedings of the 5th conference on Winter simulation - WSC '71 - Time flow mechanisms for use in digital logic simulation

Szygenda, Stephen A., Hemming, Cliff W., Hemphill, John M.

Year:

1971

Language:

english

File:

PDF, 507 KB

english, 1971

24

[ACM Press the ninth design automation workshop - Not Known (1972.06.26-1972.06.28)] Proceedings of the ninth design automation workshop on Design automation - DAC '72 - TEGAS2---anatomy of a general purpose TEST GENERATION AND SIMULATION system for digital logic

Szygenda, S. A.

Year:

1972

Language:

english

File:

PDF, 1.14 MB

english, 1972

25

[IEEE Comput. Soc IEEE Computer Society Annual Symposium on VLSI - Lafayette, LA, USA (19-20 Feb. 2004)] IEEE Computer Society Annual Symposium on VLSI - A genetic approach for conjunction scheduling in symbolic equivalence checking

Lun Li,, Thornton, M.A., Szygenda, S.A.

Year:

2004

Language:

english

File:

PDF, 235 KB

english, 2004

26

[IEEE Comput. Soc. Press Simulation Symposium - Phoenix, AZ, USA (9-13 April 1995)] Proceedings of Simulation Symposium - Special purpose array processor for digital logic simulation

Youngmin Hur,, Szygenda, S.A.

Year:

1995

Language:

english

File:

PDF, 584 KB

english, 1995

27

[IEEE Ninth Annual International Phoenix Conference on Computers and Communications. 1990 Conference Proceedings - Scottsdale, AZ, USA (1990.03.21-1990.03.23)] Ninth Annual International Phoenix Conference on Computers and Communications. 1990 Conference Proceedings - A mixed-level MOS logic simulator utilizing a new continuous strength algebra (CSAL)

Kong, J.-H., Szygenda, S.A.

Year:

1990

Language:

english

File:

PDF, 876 KB

english, 1990

28

[IEEE International Phoenix Conference on Computers and Communications - Scottsdale, AZ, USA (28-31 March 1995)] Proceedings International Phoenix Conference on Computers and Communications - Logic, fault, and design error simulation based on an integrated hardware array

Hur, Y., Szygenda, S.A.

Year:

1995

Language:

english

File:

PDF, 549 KB

english, 1995

29

[IEEE 2007 IEEE Conference on Technologies for Homeland Security - Woburn, MA (2007.05.16-2007.05.17)] 2007 IEEE Conference on Technologies for Homeland Security - Components of Continuous IT Availability & Disaster Tolerant Computing: 2007 IEEE Conference on Technologies for Homeland Security: Enhancing Critical Infrastructure Dependability

Lawler, Chad M., Szygenda, Stephen A.

Year:

2007

Language:

english

File:

PDF, 599 KB

english, 2007

30

[IEEE Comput. Soc. Press Proceedings. 25th Annual Simulation Symposium - Orlando, FL, USA (6-9 April 1992)] Proceedings. 25th Annual Simulation Symposium - The Automatic Element Routine Generator: an automatic programming tool for functional simulator design

Chuang, C.-I., Szygenda, S.A., Baker, J.D.

Year:

1992

Language:

english

File:

PDF, 488 KB

english, 1992

31

[IEEE [1992] Proceedings. Fifth Annual IEEE International ASIC Conference and Exhibit - Rochester, NY, USA (21-25 Sept. 1992)] [1992] Proceedings. Fifth Annual IEEE International ASIC Conference and Exhibit - Automatic error pattern generation for design error detection in a design validation simulation system

Kang, S., Szygenda, S.A.

Year:

1992

Language:

english

File:

PDF, 393 KB

english, 1992

32

[IEEE Comput. Soc. Press Tenth Annual International Phoenix Conference on Computers and Communications - Scottsdale, AZ, USA (27-30 March 1991)] [1991 Proceedings] Tenth Annual International Phoenix Conference on Computers and Communications - MOVE: model verification system

Kang, S., Szygenda, S.A.

Year:

1991

Language:

english

File:

PDF, 575 KB

english, 1991

33

[IEEE PACRIM. 2005 IEEE Pacific Rim Conference on Communications, Computers and signal Processing, 2005. - Victoria, BC, Canada (24-26 Aug., 2005)] PACRIM. 2005 IEEE Pacific Rim Conference on Communications, Computers and signal Processing, 2005. - BDD-based conjunctive decomposition using a genetic algorithm and dependent variable affinity

Lun Li,, Thornton, M.A., Szygenda, S.

Year:

2005

File:

PDF, 499 KB

2005

34

[IEEE Eighth International Application Specific Integrated Circuits Conference - Austin, TX, USA (18-22 Sept. 1995)] Proceedings of Eighth International Application Specific Integrated Circuits Conference - Single chip array processor for high performance design error simulation

Sungho Kang,, Szygenda, S.A.

Year:

1995

Language:

english

File:

PDF, 488 KB

english, 1995

35

[IEEE Comput. Soc. Press 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors - Cambridge, MA, USA (11-14 Oct. 1992)] Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors - Modelling and simulation of design errors

Kang, S., Szygenda, S.A.

Year:

1992

Language:

english

File:

PDF, 367 KB

english, 1992

36

Design validation: comparing theoretical and empirical results of design error modeling

Sungho Kang,, Szygenda, S.A.

Journal:

IEEE Design & Test of Computers

Year:

1994

Language:

english

File:

PDF, 783 KB

english, 1994

37

[IEEE Comput. Soc. Press 1995 1st IEEE Symposium on High Performance Computer Architecture - Raleigh, NC, USA (22-25 Jan. 1995)] Proceedings of 1995 1st IEEE Symposium on High Performance Computer Architecture - Massively parallel array processor for logic, fault, and design error simulation

Hur, Y., Szygenda, S.A., Scott Fehr, E., Ott, G.E., Sungho Kang,

Year:

1995

Language:

english

File:

PDF, 571 KB

english, 1995

38

The simulation automation system (SAS); concepts, implementation, and results

Sungho Kang,, Szygenda, S.A.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1994

Language:

english

File:

PDF, 895 KB

english, 1994

39

[IEEE 2014 IEEE 44th International Symposium on Multiple-Valued Logic (ISMVL) - Bremen, Germany (2014.5.19-2014.5.21)] 2014 IEEE 44th International Symposium on Multiple-Valued Logic - System Probability Distribution Modeling Using MDDs

Thornton, M.A., Manikas, T.W., Szygenda, S.A., Nagayama, Shinobu

Year:

2014

Language:

english

File:

PDF, 794 KB

english, 2014

40

[IEEE Comput. Soc. Press ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors - Austin, TX, USA (2-4 Oct. 1995)] Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors - Statistics on concurrent fault and design error simulation

Grayson, B., Shaikh, S.A., Szygenda, S.A.

Year:

1995

Language:

english

File:

PDF, 671 KB

english, 1995

41

[IEEE 1991 International Conference on Circuits and Systems - Shenzhen, China (16-17 June 1991)] 1991 International Conference on Circuits and Systems - m3DI: a dynamic configurable multilayer router in the automatic cell layout generation environment

Lau, K.M., Wiley, C., Szygenda, S.A.

Year:

1991

Language:

english

File:

PDF, 512 KB

english, 1991

42

[IEEE 2007 1st Annual IEEE Systems Conference - Honolulu, HI, USA (2007.04.9-2007.04.13)] 2007 1st Annual IEEE Systems Conference - Techniques for Disaster Tolerant Information Technology Systems

Lawler, Chad M., Szygenda, Stephen A., Thornton, Mitchell A.

Year:

2007

Language:

english

File:

PDF, 531 KB

english, 2007

43

[IEEE 2010 4th Annual IEEE Systems Conference - San Diego, CA (2010.04.5-2010.04.8)] 2010 IEEE International Systems Conference - Large system decomposition and simulation methodology using axiomatic analysis

Spenner, L, Krier, P, Thornton, M, Nair, S, Szygenda, S, Manikas, T

Year:

2010

Language:

english

File:

PDF, 1.22 MB

english, 2010

44

[IEEE Comput. Soc. Press EURO-DAC '92: European Design Automation Conference - Hamburg, Germany (7-10 Sept. 1992)] Proceedings EURO-DAC '92: European Design Automation Conference - New design error modeling and metrics for design validation

Kang, S., Szygenda, S.A.

Year:

1992

Language:

english

File:

PDF, 542 KB

english, 1992

45

[IEEE 2010 4th Annual IEEE Systems Conference - San Diego, CA (2010.04.5-2010.04.8)] 2010 IEEE International Systems Conference - Cyber threat trees for large system threat cataloging and analysis

Ongsakorn, P, Turney, K, Thornton, M, Nair, S, Szygenda, S, Manikas, T

Year:

2010

Language:

english

File:

PDF, 746 KB

english, 2010

46

[IEEE Comput. Soc. Press 1997 SCS Simulation Multiconference - Atlanta, GA, USA (7-9 April 1997)] Proceedings of 1997 SCS Simulation Multiconference - Exploiting component/event-level parallelism in concurrent fault and design error simulation

Shaikh, S.A., Szygenda, S.A.

Year:

1997

Language:

english

File:

PDF, 1.06 MB

english, 1997

47

[IEEE Comput. Soc. Press 29th Annual Simulation Symposium - New Orleans, LA, USA (8-11 April 1996)] Proceedings of the 29th Annual Simulation Symposium - A simulation tool for design error models utilizing error compression and sampling

Hur, Y., Szygenda, S.A.

Year:

1996

Language:

english

File:

PDF, 769 KB

english, 1996

48

[IEEE Comput. Soc. Press 1997 SCS Simulation Multiconference - Atlanta, GA, USA (7-9 April 1997)] Proceedings of 1997 SCS Simulation Multiconference - Concurrent fault and design error simulation in interactive simulation automation system

Hur, Y.-M., Shaikh, S., Goldenberg, S., Kacprzak, D., Szygenda, S.A.

Year:

1997

Language:

english

File:

PDF, 796 KB

english, 1997

49

[IEEE 1991., IEEE International Sympoisum on Circuits and Systems - Singapore (11-14 June 1991)] 1991., IEEE International Sympoisum on Circuits and Systems - M3DII: a configurable multilayer router for compact custom cell design

Lau, K.M., Wiley, C., Szygenda, S.A.

Year:

1991

Language:

english

File:

PDF, 504 KB

english, 1991

50

[IEEE 1993 IEEE International Symposium on Circuits and Systems - Chicago, IL, USA (3-6 May 1993)] 1993 IEEE International Symposium on Circuits and Systems - m3D: A multidimensional dynamic configurable router

Wiley, C., Lau, K.M., Szygenda, S.A.

Year:

1993

Language:

english

File:

PDF, 543 KB

english, 1993

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